cystech electronics corp. spec. no. : c 211sp issued date : 20 17.11.08 revised date : page no. : 1 / 7 disn0165sp preliminary cyste k product specification switching control diode disn0165sp features ? high current capability ? smoothly soft reverse recovery time (trr) ? low profile surface mounted package in order to minimize board space ? pb - free lead plating and halogen - free package mechanical data ? ca se : to - 277 molded plastic ? epoxy : ul94 - v0 rated flame retardant ? terminals : plated terminals, solderable per mil - std - 202 m ethod 20 8 ? weight : approx. 0.09 3 gram symbol outline ordering information device package shipping disn0165sp - 65 - td - g to - 277 ( pb - free lead plating and halogen - free package ) 5000 pcs / tape & reel disn0165sp to - 277 environment friendly grade : s for rohs compliant products, g for rohs compliant and green compound products packing spec, td : 5 000 pcs / tape & reel, 13 reel product rank, zero for no rank products product name cathode not connected anode cathode anode not connected 1 3 2 1 3 2
cystech electronics corp. spec. no. : c 211sp issued date : 20 17.11.08 revised date : page no. : 2 / 7 disn0165sp preliminary cyste k product specification absolute maximum ratings (t a =25 , unless otherwise noted) parameter s conditio ns symbol value units repetitive peak reverse voltage v rrm 650 v rms voltage v rms 455 v continuous reverse voltage v r 650 v forward rectified current single phase half wave, 60hz @t j =25 c i f(av) 1 a repetitive peak forward current single phase hal f wave, 60hz @t j =25 c i frm 1.57 a forward surge current 8.3ms single half sine - wave superimposed on rated load (jedec method) i fsm 14 a maximum reverse recovery time i f = 1 a , di f /dt=100a/ s trr 1 s storage temperature range tstg - 55~+150 ? c operating junction temperature range tj - 55~+150 ? c thermal data parameter symbol value unit thermal resistance, junction - to - case, max r th,j - c 12.5 ? c /w thermal resistance, junction - to - ambient , max (note 1 ) r th,j - a 39 thermal resistance, junction - to - ambient, max (note 2 ) 75 thermal resistance, junction - to - ambient, max (note 3) 169 power dissipation @ t c =25 c p d 10 w power dissipation @ t a =25 c (note 1 ) 3.2 power dissipation @ t a =25 c (note 2 ) 1.7 power dissipation @ t a =25 c (note 3 ) 0.74 note: 1. device mounted on fr - 4 pcb , single sided 2 oz. copper, pad dimension 50mm 50mm. 2. device mounted on fr - 4 pcb , single sided 1 oz. copper, pad dimension 25mm 25mm. 3. device mounted on fr - 4 pcb , single sided 1 oz. copper, minimum recommended pad dimension. characteristics (t a =25 ? c , unless otherwise noted ) characteristic sym bol condition min. typ max. unit continuous reverse voltage v r i r =100 a 650 - - v forward voltage v f 1 i f = 100m a - - 1.1 v v f 2 i f = 500m a - - 1.2 reverse leakage current i r v r = 54 0v - - 100 n a v r = 54 0v , t a =125 ? c - - 10 a junction capacitance c j v r = 1 v, f=1mhz - 7 - pf
cystech electronics corp. spec. no. : c 211sp issued date : 20 17.11.08 revised date : page no. : 3 / 7 disn0165sp preliminary cyste k product specification typical c haracteristics power derating curve 0 0.5 1 1.5 2 2.5 3 3.5 0 25 50 75 100 125 150 175 ambient temperature---t a () power dissipation(w) s ee note1 on page 2 s ee note 2 on page 2 s ee note 3 on page 2 power derating curve 0 2 4 6 8 10 12 0 25 50 75 100 125 150 175 case temperature---t c ) power dissipation(w) forward current vs forward voltage 1 10 100 1000 10000 0 0.4 0.8 1.2 1.6 2 2.4 2.8 forward voltage---v f (v) instantaneous forward current---i f (ma) pulse width=300 s 125 25 c 75 c -40c reverse leakage current vs reverse voltage 0.01 0.1 1 10 100 1000 0 100 200 300 400 500 600 700 reverse voltage---v r (v) reverse leakage current---i r (na) 75 25 125 -40c junction capacitance vs reverse voltage 1 10 100 0.1 1 10 100 reverse voltage---v r (v) junction capacitance---c j (pf) tj=25, f=1.0mhz
cystech electronics corp. spec. no. : c 211sp issued date : 20 17.11.08 revised date : page no. : 4 / 7 disn0165sp preliminary cyste k product specification recommended soldering footprint
cystech electronics corp. spec. no. : c 211sp issued date : 20 17.11.08 revised date : page no. : 5 / 7 disn0165sp preliminary cyste k product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c 211sp issued date : 20 17.11.08 revised date : page no. : 6 / 7 disn0165sp preliminary cyste k product specification recommended wave soldering condition product peak temperature soldering time pb - free devices 260 +0/ - 5 ? c 5 +1/ - 1 seconds recommended temperature profile for ir reflow profile feature sn - pb eutec tic assembly pb - free assembly average ramp - up rate (tsmax to tp) 3 ? c /second max. 3 ? c /second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 ? c 150 ? c 60 - 120 seconds 150 ? c 200 ? c 60 - 180 seconds time maintained ab ove: ? temperature (t l ) ? time (t l ) 183 ? c 60 - 150 seconds 217 ? c 60 - 150 seconds peak temperature(t p ) 240 +0/ - 5 ? c 260 +0/ - 5 ? c time within 5 ? c of actual peak temperature(tp) 10 - 30 seconds 20 - 40 seconds ramp down rate 6 ? c /second max. 6 ? c /second max. t ime 25 ? c to peak temperature 6 minutes max. 8 minutes max. note :1. all temperatures refer to topside of the package, measured on the package body surface. 2.for devices mounted on fr - 4 pcb of 1.6mm or equivalent grade pcb. if other grade pcb is used, care should be taken to match the coefficients of thermal expansion between components and pcb. if they are not matched well, the solder joints may crack or the bodies of the parts may crack or shatter as the a ssembly cools.
cystech electronics corp. spec. no. : c 211sp issued date : 20 17.11.08 revised date : page no. : 7 / 7 disn0165sp preliminary cyste k product specification to - 277 dimension dim millimeters inches dim millimeters inches min. max. min. max. min. max. min. max. a 1.05 1.15 0.041 0.045 d2 2.95 3.15 0.116 0.124 b1 0.80 0.99 0.031 0.039 e 6.40 6.60 0.252 0.26 0 b2 1.70 1.88 0.067 0.074 e1 5.30 5.45 0.209 0.215 b3 0.15 0.35 0.006 0.014 e2 3.45 3.65 0.136 0.144 c 0.20 0.33 0.008 0.013 e3 4.20 4.60 0.165 0.181 d 4.00 4.30 0.157 0.169 e 1.84 typ 0.072 typ d1 3.90 4.05 0.154 0.159 l 0.75 0.95 0.030 0.037 not es : 1. controlling dimension : millimeters. 2 . maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please conta ct your local cystek sales office. material : ? lead : pure tin plated. ? mold compound : epoxy resin family, flammability solid burning class:ul94v - 0 . important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cyste k . ? cyste k reserves the right to make changes to its products without notice. ? cyste k semiconductor products are not warranted to be suitable for use in life - support applications, or systems. ? cyste k assumes no liabili ty for any consequence of customer product design, infringement of patents, or application assistance. to - 277 plastic surface mounted package cystek package code: sp cathode anode cathode marking: disn 0165 d ate code
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